1/6 preliminary data november 2002 STL34NF06 n-channel 60v - 0.024 w -34apowerflat? low gate charge stripfet?ii mosfet (1) starting t j =25c,i d =17a,v dd = 42v typical r ds (on) = 0.024 w improved die-to-footprint ratio very low profile package description this power mosfet is the second generation of stmicroelectronics unique stripfet? technolo- gy. the resulting transistor shows extremely low on- resistance and minimal gate charge. the new pow- erflat? package allow a significant reduction in board space without compramising performance. applications dc-dc converters battery management in nomadic equipment absolute maximum ratings (?)pulse width limited by safe operating area (*) current limited by wire bonding is 20a type v dss r ds(on) i d STL34NF06 60 v < 0.028 w 34 a symbol parameter value unit v ds drain-source voltage (v gs =0) 60 v v dgr drain-gate voltage (r gs =20k w ) 60 v v gs gate- source voltage 20 v i d drain current (continuous) at t c = 25c (*) drain current (continuous) at t c = 100c 34 20 a a i dm ( ) drain current (pulsed) 136 a p tot total dissipation at t c = 25c 70 w derating factor 0.56 w/c e as (1) single pulse avalanche energy 250 mj t stg storage temperature C55 to 150 c t j max. operating junction temperature powerflat?(5x5) (chip scale package) internal schematic diagram
STL34NF06 2/6 thermal data (*) when mounted on 1inch2 fr4 board, 2oz of cu, t 10 sec. electrical characteristics (t case = 25 c unless otherwise specified) off on (1) dynamic 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. rthj-case thermal resistance junction-case max 1.8 c/w rthj-pcb (#) thermal resistance junction-ambient max 31.2 c/w symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 60 v i dss zero gate voltage drain current (v gs =0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds =0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs ,i d = 250a 2v r ds(on) static drain-source on resistance v gs =10v,i d =17a 0.024 0.028 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds =30v , i d = 17 a tbd s c iss input capacitance v ds =25v,f=1mhz,v gs =0 920 pf c oss output capacitance 225 pf c rss reverse transfer capacitance 80 pf
3/6 STL34NF06 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. 3. current limited by wire bonding is 20a symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd =30v,i d =17a r g = 4.7 w v gs =10v (see test circuit, figure 3) 11 ns t r rise time 50 ns q g total gate charge v dd =48v,i d =34a, v gs =10v 32 43 nc q gs gate-source charge 6.5 nc q gd gate-drain charge 14.4 nc symbol parameter test conditions min. typ. max. unit t d(off) turn-off-delay time v dd =30v,i d = 17a, r g = 4.7 w, v gs =10v (see test circuit, figure 3) 27 ns t f fall time 11 ns symbol parameter test conditions min. typ. max. unit i sd (3) source-drain current 34 a i sdm (2) source-drain current (pulsed) 136 a v sd (1) forward on voltage i sd =34a,v gs =0 1.2 v t rr reverse recovery time i sd = 34 a, di/dt = 100a/s, v dd =10v,t j =150c (see test circuit, figure 5) 63 ns q rr reverse recovery charge 151 nc i rrm reverse recovery current 4.8 a
STL34NF06 4/6 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
5/6 STL34NF06 dim. mm. inch min. typ max. min. typ. max. a 0.90 1.00 0.035 0.039 a1 0.02 0.05 0.001 0.002 b 0.43 0.51 0.58 0.017 0.020 0.023 c 0.33 0.41 0.48 0.013 0.016 0.019 d 5.00 0.197 e 5.00 0.197 e2 3.10 3.18 3.25 0.122 0.125 0.128 e 1.27 0.050 powerflat ? (5x5) mechanical data
STL34NF06 6/6 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no res ponsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devi ces or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2002 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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